1. Field of the Invention
This invention relates to a semiconductor memory unit and, more particularly, to its functions for increased security and access inhibition.
2. Description of the Related Art
FIG. 7 is a schematic block diagram of a conventional semiconductor memory unit. Ordinarily, an address bus 6, a control bus 7 and a data bus 8 are connected to a memory 2 incorporated in the semiconductor memory unit for the purpose of controlling read/write of an internal storage area of the memory. If the memory 2 is a SRAM (static random access memory), control bus 7 signals include a chip enable signal (CE), an output enable signal (OE), and write enable signal (WE). If the memory 2 is a ROM (read only memory), control bus 7 signals include a chip enable signal (CE) and an output enable signal (OE). The operation of such memory (memory IC) is described, for example, in "IC Memory Card Guide Line" issued from Japanese Electronic Industry Development Association in September 1986, and will not be specifically described in this specification.
Ordinarily, semiconductor memory units of this kind operate unconditionally in response to an external signal. That is, if a predetermined signal is applied, a read/write operation is performed; anybody can access the corresponding area of the memory.
Thus, in conventional semiconductor memory units, anyone can access a memory area for read/write and there is no security function for read/write operations. With the personalization of information and data, a need for prevention of forgery and unauthorized alteration or unauthorized copying of information and data has arisen. However, conventional semiconductor memory units can easily be operated to copy, alter or falsify applications software programs, operation systems, font data and other kinds of data having high development costs.